71 research outputs found

    A review of selected topics in physics based modeling for tunnel field-effect transistors

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    The research field on tunnel-FETs (TFETs) has been rapidly developing in the last ten years, driven by the quest for a new electronic switch operating at a supply voltage well below 1 V and thus delivering substantial improvements in the energy efficiency of integrated circuits. This paper reviews several aspects related to physics based modeling in TFETs, and shows how the description of these transistors implies a remarkable innovation and poses new challenges compared to conventional MOSFETs. A hierarchy of numerical models exist for TFETs covering a wide range of predictive capabilities and computational complexities. We start by reviewing seminal contributions on direct and indirect band-to-band tunneling (BTBT) modeling in semiconductors, from which most TCAD models have been actually derived. Then we move to the features and limitations of TCAD models themselves and to the discussion of what we define non-self-consistent quantum models, where BTBT is computed with rigorous quantum-mechanical models starting from frozen potential profiles and closed-boundary Schr\uf6dinger equation problems. We will then address models that solve the open-boundary Schr\uf6dinger equation problem, based either on the non-equilibrium Green's function NEGF or on the quantum-transmitting-boundary formalism, and show how the computational burden of these models may vary in a wide range depending on the Hamiltonian employed in the calculations. A specific section is devoted to TFETs based on 2D crystals and van der Waals hetero-structures. The main goal of this paper is to provide the reader with an introduction to the most important physics based models for TFETs, and with a possible guidance to the wide and rapidly developing literature in this exciting research field

    Multi-dimensional modeling and simulation of semiconductor nanophotonic devices

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    Self-consistent modeling and multi-dimensional simulation of semiconductor nanophotonic devices is an important tool in the development of future integrated light sources and quantum devices. Simulations can guide important technological decisions by revealing performance bottlenecks in new device concepts, contribute to their understanding and help to theoretically explore their optimization potential. The efficient implementation of multi-dimensional numerical simulations for computer-aided design tasks requires sophisticated numerical methods and modeling techniques. We review recent advances in device-scale modeling of quantum dot based single-photon sources and laser diodes by self-consistently coupling the optical Maxwell equations with semiclassical carrier transport models using semi-classical and fully quantum mechanical descriptions of the optically active region, respectively. For the simulation of realistic devices with complex, multi-dimensional geometries, we have developed a novel hp-adaptive finite element approach for the optical Maxwell equations, using mixed meshes adapted to the multi-scale properties of the photonic structures. For electrically driven devices, we introduced novel discretization and parameter-embedding techniques to solve the drift-diffusion system for strongly degenerate semiconductors at cryogenic temperature. Our methodical advances are demonstrated on various applications, including vertical-cavity surface-emitting lasers, grating couplers and single-photon sources

    DAG-Aware Circuit Compression For Formal Verification Per Bjesse

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    Abstract — The choice of representation for circuits and boolean formulae in a formal verification tool is important for two reasons. First of all, representation compactness is necessary in order to keep the memory consumption low. This is witnessed by the importance of maximum processable design size for equivalence checkers. Second, many formal verification algorithms are sensitive to redundancies in the design that is processed. To address these concerns, three different autocompressing representations for boolean circuit networks and formulas have been suggested in the literature. In this paper, we attempt to find a blend of features from these alternatives that will allow us to remove as much redundancy as possible while not sacrificing runtime. By studying how the network representation size varies when we change parameters, we show that the use of only one operator node is suboptimal, and demonstrate that the most powerful of the proposed reduction rules, two-level minimization, actually can be harmful. We correct the bad behavior of two-level optimization by devising a simple linear simplification algorithm that can remove tens of thousands of nodes on examples where all obvious redundancies already have been removed. The combination of our compactor with the simplest representation outperforms all of the alternatives we have studied, with a theoretical runtime bound that is at least as good as the three studied representations. I

    Automatic assume guarantee analysis for assertion-based formal verification

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    Abstract — Assertion based verification encourages the insertion of many assertions into a design. Typically, not all assertions can be proven (or falsified). The indeterminate assertions require manual analysis in order to determine design correctness – a time-consuming and error-prone process. This paper shows how automatic assume guarantee reasoning can be used to reduce the amount of manual analysis. We present algorithms to automatically compute the assume guarantee relations between assertions. We extend circular assume guarantee reasoning to compute more proofs. And, we show how automatic assume guarantee reasoning can be used in practice to reduce the number of indeterminate assertions requiring manual analysis. We present the results of applying our algorithms to large industrial designs. I
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